CVE-2025-31936

Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may allow an escalation of privilege. SMM adversary with a privileged user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.

CVSS

No CVSS.

References

Link	Resource
https://intel.com/content/www/us/en/security-center/advisory/intel-sa-01379.html

Configurations

No configuration.

History

No history.

Information

Published : 2026-08-11 17:17

Updated : 2026-08-12 20:54

NVD link : CVE-2025-31936

Mitre link : CVE-2025-31936

CVE.ORG link : CVE-2025-31936

JSON object : View

Products Affected

No product.

CWE

CWE-1260

Improper Handling of Overlap Between Protected Memory Ranges

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